A conventional bandgap reference (BGR) circuit generates a reference voltage that remains constant with varying temperature. BGR circuits typically combine the negative temperature coefficient of the bandgap voltage of a transistor with the positive temperature coefficient of the voltage drop across a resistor with increasing current to achieve a zero overall temperature coefficient. The zero temperature coefficient typically occurs when the combined voltage drop across the transistor and resistor equals the silicon bandgap voltage of about 1.22 volts.
FIG. 1 (prior art) shows one conventional BGR circuit 10 that allows an output reference voltage (VREF) to be adjusted to a voltage that is below the bandgap voltage of silicon. Moreover, BGR circuit 10 can operate with a supply voltage (VCC) of less than 1 volt. BGR circuit 10 includes a single diode 11, a set of N diodes 12, a differential amplifier 13, a current mirror 14 and four resistors R1, R2, R3 and R4. Each of the diodes is a diode-connected CMOS transistor. Current mirror 14 includes three PMOS transistors P1, P2 and P3 having the same dimensions. Because the gates of P1, P2 and P3 are each connected to a common node with a voltage V1, three equal currents I1, I2 and I3 are generated.
The resistances of resistor R1 and resistor R2 are equal, and therefore a current I1B and a current I2B that flow through resistor R1 and resistor R2, respectively, are equal. Consequently, a current I1A and a current I2A are also equal. Current I1A flows through diode 11, and current I2A flows through resistor R3 and diode set 12. VF1 is the voltage drop across diode 11, VF2 is the voltage drop across diode set 12, and dVF is the voltage drop across resistor R3. Differential amplifier 13 operates to maintain two input voltages VA and VB at the same voltage. Therefore, VF1 equals the sum of VF2 plus dVF. The negative temperature coefficient of VF1 is compensated by the positive temperature coefficient of dVF with increasing current, and the voltage level of VA and VB remains stable over varying temperatures.
The output reference voltage VREF is generated using the mirrored current I3 and the voltage drop across resistor R4. The reference voltage VREF can therefore be adjusted by adjusting resistor R4. The reference voltage VREF equals R4(VF1/R2+dVF/R3) and can be adjusted without changing the temperature coefficient of the bandgap, which is dependent on R2 and R3, where R1 equals R2.
FIG. 2 (prior art) shows the reference voltage VREF generated by BGR circuit 10 as a function of the supply voltage VCC. The relationship between the supply voltage VCC and other voltages (VA, VB, V1 and VS) on nodes of BGR circuit 10 is also shown. FIG. 2 shows that a reference voltage significantly below the silicon bandgap voltage of 1.22 volts can be generated. For example, reference voltage VREF equals about 0.55 volts when the final operating point of voltages VA and VB is about 0.6 volts. For additional information on BGR circuit 10, see the journal article entitled “A CMOS Bandgap Reference Circuit with Sub-1-V Operation,” by Hironori Banba et al., published in the IEEE Journal of Solid-State Circuits, Vol. 34, No. 5, May 1999, pages 670–674.
Under some conditions, however, BGR circuit 10 outputs a reference voltage the does not equal R4(VF1/R2+dVF/R3). As BGR circuit 10 is powered up, differential amplifier 13 can stabilize at incorrect operating points. Under these conditions, BGR circuit 10 outputs an inaccurate reference voltage that may lie significantly below the voltage defined by R4(VF1/R2+dVF/R3).
A method is sought for generating an adjustable bandgap reference voltage that is not rendered inaccurate due to stabilization at incorrect operating points.